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Epson S1C63558 User Manual

Page 65

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S1C63558 TECHNICAL MANUAL

EPSON

55

CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (LCD Driver)

LPWR: LCD power control (ON/OFF) register (FF60H•D0)

Turns the LCD system voltage circuit ON and OFF.

When "1" is written: ON
When "0" is written: OFF

Reading: Valid

When "1" is written to the LPWR register, the LCD system voltage circuit goes ON and generates the LCD
drive voltage. When "0" is written, all the LCD drive voltages go to V

SS

level.

It takes about 100 msec for the LCD drive voltage to stabilize after starting up the LCD system voltage
circuit by writing "1" to the LPWR register.
At initial reset, this register is set to "0".

LDUTY0, LDUTY1: LCD drive duty switching register (FF60H•D2, D3)

Selects the LCD drive duty.

Table 4.7.7.2 Drive duty setting

LDUTY1

1

0

0

LDUTY0

1

0

Drive

duty

1/8

1/16

1/17

Common terminal

used

COM0–COM7

COM0–COM15

COM0–COM16

Maximum segment

number

320 (40

Ч

8)

640 (40

Ч

16)

680 (40

Ч

17)

When 48

×

8 mask option

is selected

384 (48

×

8)

Invalid

Invalid

At initial reset, this register is set to "0". When 48

×

8 is selected by mask option, reset to 1/8 duty.

ALON: LCD all ON control register (FF61H•D1)

Displays the all LCD dots ON.

When "1" is written: All LCD dots displayed
When "0" is written: Normal display

Reading: Valid

By writing "1" to the ALON register, all the LCD dots goes ON, and when "0" is written, it returns to
normal display.
This function outputs an ON waveform to the SEG terminals, and does not affect the content of the
display memory.
ALON has priority over ALOFF.
At initial reset, this register is set to "0".

ALOFF: LCD all OFF control register (FF61H•D2)

Fade outs the all LCD dots.

When "1" is written: All LCD dots fade out
When "0" is written: Normal display

Reading: Valid

By writing "1" to the ALOFF register, all the LCD dots goes OFF, and when "0" is written, it returns to
normal display.
This function outputs an OFF waveform to the SEG terminals, and does not affect the content of the
display memory.
At initial reset, this register is set to "1".