Epson S1C63558 - Manual (Page 152)

142 EPSON S1C63558 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (FSK Demodulator)
4.15.5 I/O memory of FSK demodulator
Table 4.15.5.1 shows the I/O address and control bits for the FSK demodulator.
Table 4.15.5.1 Control bits of FSK demodulator
Address Comment
D3 D2
Register
D1 D0 Name Init
∗
1 1 0
FF66H
FSKON 0 RDET CDET
R/W R
FSKON
0
∗ 3
RDET
CDET
0
–
∗ 2
–
∗
4
0
On
Ring
Carrier
Off
No Ring
No Carrier
FSK demodulator On/Off
Unused
Ring detection bit
Carrier detection bit
FF67H
0 0 RDETCP CDETCP
R R/W
0
∗
3
0
∗ 3
RDETCP
CDETCP
–
∗
2
–
∗ 2
0
0
Unused
Unused
RDET comparison register
CDET comparison register
FFFAH
0 0 IRDET ICDET
R R/W
0
∗
3
0
∗ 3
IRDET
ICDET
–
∗
2
–
∗ 2
0
0
(R)
Yes
(W)
Reset
(R)
No
(W)
Invalid
Unused
Unused
Interrupt factor flag (FSK demodulator ring detection)
Interrupt factor flag (FSK demodulator carrier detection)
FFEAH
0 0 EIRDET EICDET
R R/W
0
∗
3
0
∗ 3
EIRDET
EICDET
–
∗
2
–
∗ 2
0
0
Enable
Enable
Mask
Mask
Unused
Unused
Interrupt mask register (FSK demodulator ring detection)
Interrupt mask register (FSK demodulator carrier detection)
*1 Initial value at initial reset
*2 Not set in the circuit
*3 Constantly "0" when being read
*4 Depends on the input status of the RDIN terminal
FSKON: FSK demodulator control register (FF66H•D3)
Turns the FSK demodulator ON and OFF.
When "1" is written: ON
When "0" is written: OFF
Reading: Valid
The FSK demodulator goes ON by writing "1" to FSKON. At the same time, the data input line of the
serial interface (2) is switched from the P30 terminal to the FSK demodulator output. The P3x terminals
function as general I/O port terminals regardless of the ESIFS setting.
When starting the FSK demodulator operation, the OSC3 oscillation circuit must be turned ON and the
CPU operating clock must be switched to the OSC3 clock.
The FSK demodulator goes OFF by writing "0" to FSKON. The P3x terminals can be set to the I/O
terminals used for the serial interface (2).
The FSK demodulator should be activated only when it is needed in order to decrease current consump-
tion.
At initial reset, this register is set to "0".
RDET: Ring detection bit (FF66H•D1)
Indicates the ring detection status.
When "1" is read: Ring is detected
When "0" is read: Ring is not detected
Writing: Invalid
A ring signal is being input when RDIT is "1". When the ring input is completed, RDET returns to "0".
This bit is dedicated for reading, so writing can not be done.
The bit valeu at initial reset depends on the input status of the RDIN terminal.