Sundance SMT381 2004 - Manual (Page 8)

Figure 44. Connector Location on SMT381, .............................................................56
Figure 45. FPGA/JTAG connector for the SMT381-VP. ...........................................60
Figure 46. SMT381 to SMT338-VP Interconnection. ................................................61
Figure 47. Components Used to Connect the SMT381 to the SMT338-VP. .............62
Figure 48. Fitting of Nylon Screws and Nuts to the SMT338-VP. .............................63
Figure 49. Securing the SMT338-VP onto a Sundance Carrier. ...............................63
Figure 50. Connecting the SMT381 to the SMT338-VP............................................64
Figure 51. Time View Captures of LVDS Interface Data...........................................65
Figure 52. Measurements of Time View Capture. ....................................................65
Figure 53. Waveform Memory - Time View Capture – 1000MHz sample frequency
(500MHz VCO Clock) – 125MHz analog output. ...............................................66
Figure 54. Measurements of Capture – 1000MHz sample frequency (500MHz VCO
Clock) – 125MHz analog output. .......................................................................66
Figure 55. Waveform Memory - FFT – 1000MHz sample frequency (500MHz VCO
Clock) – 125MHz analog output – Channel A....................................................67
Figure 56. Waveform Memory - FFT – 1000MHz sample frequency (500MHz VCO
Clock) – 125MHz analog output – Channel B....................................................67
Figure 57. Waveform Memory - FFT – 1400MHz sample frequency (700MHz
Synthesizer Clock) – 175MHz analog output – Channel A. ...............................68
Figure 58. Waveform Memory - FFT – 1400MHz sample frequency (700MHz
Synthesizer Clock) – 175MHz analog output – Channel B. ...............................68
Figure 59. Waveform Memory - FFT – 600MHz sample frequency (300MHz VCO
Clock) – 75MHz analog output – Channel A......................................................69
Figure 60. Waveform Memory - FFT – 600MHz sample frequency (300MHz VCO
Clock) – 75MHz analog output – Channel B......................................................69
Figure 61. Clock Synthesizer Register. ....................................................................70
Figure 62. Clock Synthesizer Frequency Calculation. ..............................................71
Figure 63. DAC serial write operation.......................................................................72
Figure 64. DAC serial read operation. ......................................................................72
Figure 65. State machine of the DAC for the SMT381..............................................73
Figure 66. Register Setup for PLL. ...........................................................................74
Figure 67. PLL Configuration Sequence...................................................................75
Figure 68. State Machine Driving the PLL Serial Interface. ......................................76
Figure 69. Test point locations on the SMT381. .......................................................77
Figure 70. Test Program Main Menu. .......................................................................78
Figure 71. SMT338-VP Sub-Menu. ..........................................................................79
Figure 72. SMT381 Sub-Menu. ................................................................................80
Figure 73. Waveform Memory Setup Sequence.......................................................81