Sundance SMT381 2004 - Manual (Page 26)

3.7 Clock Synthesizer Interface
A three wire uni-directional control interface is implemented between the FPGA and
the Micrel clock synthesizer on the daughter card. The clock synthesizer can
generate a variable 50 – 950 MHz clock. The jitter on this clock is higher than on the
main PLL+VCO clock, but it is convenient for testing.
3.8 TIM Interface
The SMT381-VP implements ComPorts 0 and 3. There are no DIP switches on the
module and all configuration data is received and transmitted over these two ports.
The ComPorts are not used for DAC data transfer. ComPort 3 is implemented as a
bi-directional transceiver interface for FPGA configuration and control operations.
ComPort 0 is available but not used in the default firmware provided with the board.
The Global Bus Interface is not implemented on the SMT381. Refer to [3] for a more
detailed description of the TIM interface.
3.9 External Trigger
The external trigger input is received by a LVPECL input buffer on the SMT381. The
buffered signal is passed down as a differential LVPECL signal to the FPGA on the
SMT338-VP. For compatibility reasons with other daughter card modules there are
no ECL termination resistors mounted on the SMT338-VP. For this reason the pulse
width of the input trigger must be at least 1uS before the FPGA will register it.
As this might be a problem for some applications this issue has been resolved on the
newer SMT338-VP modules and appropriate termination resistors are provided to
improve the response time of the FPGA to an external trigger.
For most systems it is likely that there will be a system host (DSP Module). For this
reason it is also possible to send a software trigger to the SMT381-VP over ComPort
3. There will however be a latency from the time that the command is sent to the time
that data is read from the memory.
3.10 Daughter card Interface
The daughter-card interface is made up of two connectors. The one is a 0.5mm pitch
differential Samtec connector. This connector is for transferring digital LVDS data to
the DAC from the main module. The second one is a 1mm pitch Samtec header type
connector. This connector is for providing power to the daughter-card.
The figure underneath illustrates this configuration. The bottom view of the daughter
card is shown on the right. This view must the mirrored to understand how it
connects to the main module.