Sundance SMT381 2004 - Manual (Page 79)

//*************************************************//
// SMT391 Test Software - Version 1.0 //
// Basic Setup: T1: SMT365; T2: SMT391; T3: SMT321 //
//*************************************************//
MM5: SMT338-VP + SMT391 SUB-MENU:
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GENERAL OPTIONS:
1: Reset the FPGA
2: Read SMT338 Firmware Version
3: Write to the SMT338 Scratch Register
4: Read the SMT338 Scratch Register
5: Read SMT338 and Daughter Card Temperatures
6: Read the SMT338 Serial Number
7: Read the SMT391 Serial Number
ADC SPECIFIC OPTIONS:
8: Select the ADC clock source
9: Set Clock Synthesizer Frequency
10: Set VCO + PLL Frequency
11: Initialize the ADC and capture data
12: Read Data Ch I - CP
13: Read Data Ch Q - CP
14: Read Data SHB Rx A
15: Read Data SHB Rx B
16: Write SHB Buffer Data to File
17: Clear All Triggers
18: Read Trigger Register
19: Set RF PLL
20: Set IF PLL
21: Plain SHB A Read
22: Plain SHB B Read
23: MemA Write Start
DAC SPECIFIC OPTIONS:
24: Debug DAC
OTHER OPTIONS:
25: Return to the Main Menu
Select:
Figure 71. SMT338-VP Sub-Menu.
Select option ‘1’ to reset the FPGA. Option ‘8’ and then ‘0’ to select the on-board
VCO as the main clock source. Option ‘10’ to set the VCO to 1000MHz and option
‘24’ to enter the SMT381 debug menu. The following menu will appear: