Sundance SMT381 2004 - Manual (Page 13)

RSL). The main memory as well as the MSP430 microprocessor is also located on
this PCB. The second PCB (daughter card – SMT381) contains all the analog
circuitry. The clock generation, trigger control, analog signal conditioning and DAC is
located on this PCB. The SMT381-VP refers to the combination of the SMT338-VP
and the SMT381.
The depth of the SMT381-VP is 21 mm. If the SMT381-VP is mated with a PCI
carrier two PCI slots will be required for the Module + Carrier combination. If the
SMT381-VP is mated with a cPCI carrier the Module + Carrier will require two cPCI
slots.
The FPGA gets control words over a ComPort interface following the Texas
Instruments
C4x ComPort standard . The FPGA receives data through the onboard
memory or SHB interface. It is then sent to the DAC cores over two 14-bit LVDS
busses according to the
SLB standard. The DACs convert the data and sends the
data to the output connectors.
Two full (60-pin) SHB connectors are accessible from the FPGA. Their main function
is to receive digital samples from other modules. Please refer to the
SHB
specification for more details about the way connectors can be configured.
A global reset signal is mapped to the FPGA from the bottom TIM connector via the
MSP430 microcontroller.
2.2 Communication Ports (ComPorts)
The SMT381-VP provides two ComPorts – ComPort 0 and ComPort 3. Both of these
ComPorts are connected to the FPGA on the SMT338-VP. ComPort 3 is also
connected to the MSP430 microprocessor. The microprocessor is the master of this
ComPort after reset and configures the FPGA with configuration data received over
this link. After configuration the microprocessor releases the ComPort to the FPGA.
These ComPorts are driven at 3.3V levels
.
2.3 Sundance High-Speed Bus (SHB)
Two SHB connectors are used to transmit data to the SMT381-VP from the external
world. Both SHB busses are identical and 60-bits wide. See the
SHB specification
for more information.