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Sundance SMT381 2004 User Manual

Page 48

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For a detailed description of the configurable bits in the Clock Synthesizer register
please refer to the “Clock Synthesizer” section under “Firmware Building Blocks” at
the end of this document.

5.4.7 PLL Setup Registers (Write Add 0x802 – 0x809)

These registers set up the frequency of the PLL circuit on the SMT381. There are
two sets of registers – one set for setting up the IF side of the PLL, and the other set
for setting up the RF side of the PLL. The IF side is unconnected, while the RF side
is connected to a 600 – 1200 MHz VCO circuit which is divided by two before
entering the DAC at a frequency of 300 – 600MHz. All registers must be initialized,
and only when writing to the final register will both the IF and RF side be configured
to their new values.

31 .. 28

27 .. 24

23 .. 20

19 .. 16

15 .. 12

11 .. 8

7 .. 4

3 .. 0

Command

Address

Data MSB

Data LSB

0x1

0x1

0x1

0x1

0x1

0x1

0x1

0x1

0x802

0x803

0x804

0x805

0x806

0x807

0x808

0x809

Not Used

Not Used

Not Used

Not Used

Smt381Pll_RfR_Reg1

Smt381Pll_RfR_Reg2

Smt381Pll_RfN_Reg1

Smt381Pll_RfN_Reg2

Not Used

Not Used

Not Used

Not Used

Smt381Pll_RfR_Reg1

Smt381Pll_RfR_Reg2

Smt381Pll_RfN_Reg1

Smt381Pll_RfN_Reg2

Figure 33. PLL Setup Registers (Write Only).

For a detailed description of the configurable bits in the PLL registers please refer to
the “PLL Configuration” section under “Firmware Building Blocks” at the end of this
document.

5.4.8 DAC Setup Registers (Write Add 0x900 – 0x905)

These registers configure the internal functionality of the DAC on the SMT381. There
are six registers – 4 data registers an address register and setup register. The
address and setup registers must be set up before the data registers. Once the data
registers are written to the data, address and setup information contained in all the
registers will be transferred to the DAC over a serial interface.

31 .. 28

27 .. 24

23 .. 20

19 .. 16

15 .. 12

11 .. 8

7 .. 4

3 .. 0

Command

Address

Data MSB

Data LSB

0x1

0x900

Smt381SetupData

Smt381SetupData

0x1

0x901

Smt381DacAddress

Smt381DacAddress

0x1

0x902

Smt381DacData(LSB)

Smt381DacData(LSB)

0x1

0x903

Smt381DacData

Smt381DacData

0x1

0x904

Smt381DacData

Smt381DacData

0x1

0x905

Smt381DacData(MSB)

Smt381DacData(MSB)

Figure 34. DAC Setup Registers (Write Only).

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