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0x09b0:0x09b7, Latch0 time positive edge, 0x09b8:0x09bf – BECKHOFF EtherCAT Registers Section II User Manual

Page 85: Latch0 time negative edge

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Distributed Clocks (0x0900:0x09FF)

Slave Controller

– Register Description

II-73

Table 123: Register Latch0 Time Positive Edge (0x09B0:0x09B3 [0x09B0:0x09B7])

ESC20

ET1100

ET1200

IP Core

[63:32]

(w ack)]

(w ack)

(w ack)

[63:32]

config.

Bit

Description

ECAT

PDI

Reset Value

63:0

Register captures System time at the positive
edge of the Latch0 signal.

r(ack)/-

r/
(w ack)*

0

NOTE: Register bits [63:8] are internally latched (ECAT/PDI independently) when bits [7:0] are read, which
guarantees reading a consistent value. Reading this register from ECAT clears Latch0 Status 0x09AE[0] if
0x0980.4=0. Writing to this register from ECAT is not possible.

* PDI register function acknowledge by Write command is disabled: Reading this register from PDI if 0x0980.4=1
clears Latch0 Status 0x09AE[0]. Writing to this register from PDI is not possible.
PDI register function acknowledge by Write command is enabled: Writing this register from PDI if 0x0980.4=1
clears Latch0 Status 0x09AE[0]. Writing to this register from PDI is possible; write value is ignored (write 0).

Table 124: Register Latch0 Time Negative Edge (0x09B8:0x09BB [0x09B8:0x09BF])

ESC20

ET1100

ET1200

IP Core

[63:32]

(w ack)]

(w ack)]

(w ack)]

[63:32]

config.

Bit

Description

ECAT

PDI

Reset Value

63:0

Register captures System time at the
negative edge of the Latch0 signal.

r(ack)/-

r/
(w ack)*

0

NOTE: Register bits [63:8] are internally latched (ECAT/PDI independently) when bits [7:0] are read, which
guarantees reading a consistent value. Reading this register from ECAT clears Latch0 Status 0x09AE[1] if
0x0980.4=0. Writing to this register from ECAT is not possible.

* PDI register function acknowledge by Write command is disabled: Reading this register from PDI if 0x0980.4=1
clears Latch0 Status 0x09AE[1]. Writing to this register from PDI is not possible.
PDI register function acknowledge by Write command is enabled: Writing this register from PDI if 0x0980.4=1
clears Latch0 Status 0x09AE[1]. Writing to this register from PDI is possible; write value is ignored (write 0).