BECKHOFF EtherCAT Registers Section II - Manual (Page 67)

FMMU (0x0600:0x06FF)
Slave Controller – Register Description II-55
Table 83: Register Physical Start address FMMU y (0x06y8-0x06y9)
ESC20 ET1100 ET1200 IP Core
Bit Description ECAT PDI Reset Value
15:0 Physical Start Address (mapped to logical
Start address) r/w r/- 0
Table 84: Register Physical Start bit FMMU y (0x06yA)
ESC20 ET1100 ET1200 IP Core
Bit Description ECAT PDI Reset Value
2:0 Physical starting bit as target of logical start
bit mapping (bits are counted from least
significant bit (=0) to most significant bit(=7) r/w r/- 0
7:3 Reserved, write 0 r/- r/- 0
Table 85: Register Type FMMU y (0x06yB)
ESC20 ET1100 ET1200 IP Core
Bit Description ECAT PDI Reset Value
0 0: Ignore mapping for read accesses
1: Use mapping for read accesses
r/w r/- 0
1 0: Ignore mapping for write accesses
1: Use mapping for write accesses
r/w r/- 0
7:2 Reserved, write 0 r/- r/- 0
Table 86: Register Activate FMMU y (0x06yC)
ESC20 ET1100 ET1200 IP Core
Bit Description ECAT PDI Reset Value
0 0: FMMU deactivated
1: FMMU activated. FMMU checks logical
addressed blocks to be mapped
according to mapping configured
r/w r/- 0
7:1 Reserved, write 0 r/- r/- 0
Table 87: Register Reserved FMMU y (0x06yD:0x06yF)
ESC20 ET1100 ET1200 IP Core
Bit Description ECAT PDI Reset Value
23:0 Reserved, write 0 r/- r/- 0