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Table 67: register eeprom address (0x0504:0x0507), 0x0504:0x0507, Eeprom address – BECKHOFF EtherCAT Registers Section II User Manual

Page 60: 0x0508:0x050f, Eeprom data

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SII EEPROM Interface (0x0500:0x050F)

II-48

Slave Controller

– Register Description

NOTE: r/(w): write access depends upon the assignment of the EEPROM interface (ECAT/PDI). Write access is
generally blocked if EEPROM interface is busy (0x0502.15=1).

NOTE: r/[w]: EEPROM emulation only: write access is possible if EEPROM interface is busy (0x0502.15=1). PDI
acknowledges pending commands by writing a 1 into the corresponding command register bits (0x0502[10:8]).
Errors can be indicated by writing a 1 into the error bit 0x0502.13. Acknowledging clears AL Event Request
0x0220[5].

*

1

ESC20: configurable with pin EEPROM SIZE, but not readable in this register.

*

2

Write Enable bit 0 is self-clearing at the SOF of the next frame, Command bits [10:8] are self-clearing after the

command is executed (EEPROM Busy ends). Writing “000” to the command register will also clear the error bits
[14:13]. Command bits [10:8] are ignored if Error Acknowledge/Command is pending (bit 13).

*

3

Error bits are cleared by writing “000” (or any valid command) to Command Register Bits [10:8].

Table 67: Register EEPROM Address (0x0504:0x0507)

ESC20

ET1100

ET1200

IP Core

Bit

Description

ECAT

PDI

Reset Value

31:0

EEPROM Address
0:

First word (= 16 bit)

1:

Second word


Actually used EEPROM Address bits:
[9:0]:

EEPROM size up to 16 kBit

[17:0]: EEPROM size 32 kBit

– 4 Mbit

[32:0]: EEPROM Emulation

r/(w)

r/(w)

0

NOTE: r/(w): write access depends upon the assignment of the EEPROM interface (ECAT/PDI). Write access is
generally blocked if EEPROM interface is busy (0x0502.15=1).

Table 68: Register EEPROM Data (0x0508:0x050F [0x0508:0x050B])

ESC20

ET1100

ET1200

IP Core

[63:32]

[63:32]

Bit

Description

ECAT

PDI

Reset Value

15:0

EEPROM Write data (data to be written to
EEPROM) or
EEPROM Read data (data read from
EEPROM,. lower bytes)

r/(w)

r/(w)
r/[w]

0

63:16

EEPROM Read data (data read from
EEPROM, higher bytes)

r/-

r/-
r/[w]

NOTE: r/(w): write access depends upon the assignment of the EEPROM interface (ECAT/PDI). Write access is
generally blocked if EEPROM interface is busy (0x0502.15=1).

NOTE: r/[w]: write access for EEPROM emulation if read or reload command is pending. See the following
information for further details: