BECKHOFF EtherCAT Registers Section II - Manual (Page 74)

Distributed Clocks (0x0900:0x09FF)
II-62 Slave Controller – Register Description
Table 98: Register Receive Time Port 3 (0x090C:0x090F)
ESC20 ET1100 ET1200 IP Core
Bit Description ECAT PDI Reset Value
31:0 Local time of the beginning of a frame (start
first bit of preamble) received at port 3
containing a BWR or FPWR to Register
0x0900.
ET1200 exception:
Local time of the beginning of the first frame
received at port 3 after time stamping was
enabled. Time stamping is disabled for this
port afterwards. r/- r/- Undefined
NOTE: Register 0x0910:0x0913[0x910:0x0917] is described in the next chapter.
Table 99: Register Receive Time ECAT Processing Unit (0x0918:0x091F)
ESC20 ET1100 ET1200 IP Core
[63:32] [63:32]
config.
Bit Description ECAT PDI Reset Value
63:0 Local time of the beginning of a frame (start
first bit of preamble) received at the ECAT
Processing Unit containing a write access to
Register 0x0900
ESC20, ET1200 exception:
Local time of the beginning of the frame
received at the ECAT Processing Unit
containing a write access to register
0x0900:0x0903.
NOTE: E.g., if port 0 is open, this register reflects
the Receive Time Port 0 as a 64 Bit value.
r/- r/- Undefined