BECKHOFF EtherCAT Registers Section II - Manual (Page 58)

SII EEPROM Interface (0x0500:0x050F)
II-46 Slave Controller – Register Description
3.45 SII EEPROM Interface (0x0500:0x050F)
Table 63: SII EEPROM Interface Register overview
Register Address Length
(Byte)
Description
0x0500 1 EEPROM Configuration
0x0501 1 EEPROM PDI Access State
0x0502:0x0503 2 EEPROM Control/Status
0x0504:0x0507 4 EEPROM Address
0x0508:0x050F 4/8 EEPROM Data
EtherCAT controls the SSI EEPROM interface if EEPROM configuration register 0x0500.0=0 and
EEPROM PDI Access register 0x0501.0=0, otherwise PDI controls the EEPROM interface.
In EEPROM emulation mode, the PDI executes outstanding EEPROM commands. The PDI has
access to some registers while the EEPROM Interface is busy.
Table 64: Register EEPROM Configuration (0x0500)
ESC20 ET1100 ET1200 IP Core
Bit Description ECAT PDI Reset Value
0 EEPROM control is offered to PDI:
0:
no
1: yes (PDI has EEPROM control)
r/w r/- 0
1 Force ECAT access:
0:
Do not change Bit 501.0
1: Reset Bit 501.0 to 0
r/w r/- 0
7:2 Reserved, write 0 r/- r/- 0
Table 65: Register EEPROM PDI Access State (0x0501)
ESC20 ET1100 ET1200 IP Core
Bit Description ECAT PDI Reset Value
0 Access to EEPROM:
0:
PDI releases EEPROM access
1: PDI takes EEPROM access (PDI has
EEPROM control)
r/- r/(w) 0
7:1 Reserved, write 0 r/- r/- 0
NOTE: r/(w): write access is only possible if 0x0500.0=1 and 0x0500.1=0.