Rom: 2-port ip core references, Rom: 2-port ip core references -1 – Altera MAX 10 Embedded Memory User Manual
Page 52
ROM: 2-PORT IP Core References
7
2015.05.04
UG-M10MEMORY
This IP core implements the dual-port ROM memory mode. The dual-port ROM has almost similar
functional ports as single-port ROM. The difference is dual-port ROM has an additional address port for
read operation.
Figure 7-1: ROM: 2-PORT IP Core Signals with the Single Clock Option Enabled
address_b[]
addressstall_a
clock
enable
q_a[]
aclr
address_a[]
addressstall_b
rden_a
rden_b
q_b[]
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