Altera MAX 10 Embedded Memory User Manual
Page 43
Option
Legal Values
Description
More Option
When you select With
one read port and one
write port, the
following options are
available:
• ‘rdaddress’ port
• ‘q_b’ port
When you select With
two read /write ports,
the following options
are available:
• ‘q_a’ port
• ‘q_b’ port
On/Off
Specifies whether the
raddress
,
q_a
, and
q_b
ports are cleared by the
aclr
port.
Parameter Settings: Output 1
Mixed Port Read-
During-Write for
Single Input
Clock RAM
When you select With
one read port and one
write port, the
following option is
available:
• How should the q
output behave
when reading a
memory location
that is being written
from the other
port?
When you select With
two read /write ports,
the following option is
available:
• How should the q_
a and q_b outputs
behave when
reading a memory
location that is
being written from
the other port?
• Old memory contents
appear
• I do not care (the outputs
will be undefined)
Specifies the output behavior
when read-during-write
occurs.
• Old memory contents
appear— The RAM
outputs reflect the old
data at that address
before the write
operation proceeds.
• I do not care—This
option functions
differently when you turn
it on depending on the
following memory block
type you select:
• When you set the
memory block type to
Auto, or M9K, the
RAM outputs ‘don't
care’ or “unknown”
values for read-
during-write
operation without
analyzing the timing
path.
UG-M10MEMORY
2015.05.04
RAM: 2-Port IP Core Parameters for MAX 10 Devices
5-15
RAM: 2-PORT IP Core References
Altera Corporation