Ram: 2-port ip core references, Ram: 2-port ip core references -1 – Altera MAX 10 Embedded Memory User Manual
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RAM: 2-PORT IP Core References
5
2015.05.04
UG-M10MEMORY
The RAM: 2-PORT IP core implements the simple dual-port RAM and true dual-port RAM memory
modes.
Figure 5-1: RAM: 2-Port IP Core Signals With the One Read Port and One Write Port, and Single Clock
Options Enabled
data[]
wren
rdaddress[]
rden
wr_addressstall
clock
enable
q[]
aclr
wraddress[]
byteena_a[]
rd_addressstall
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