Altera MAX 10 Embedded Memory - Manual (Page 2)

Contents
MAX 10 Embedded Memory Overview.............................................................. 1-1
MAX 10 Embedded Memory Architecture and Features...................................2-1
MAX 10 Embedded Memory General Features...................................................................................... 2-1
Control Signals................................................................................................................................. 2-1
Parity Bit............................................................................................................................................2-2
Read Enable.......................................................................................................................................2-2
Read-During-Write......................................................................................................................... 2-3
Byte Enable........................................................................................................................................2-3
Packed Mode Support..................................................................................................................... 2-4
Address Clock Enable Support.......................................................................................................2-5
Asynchronous Clear........................................................................................................................ 2-6
MAX 10 Embedded Memory Operation Modes.....................................................................................2-7
Supported Memory Operation Modes..........................................................................................2-7
MAX 10 Embedded Memory Clock Modes.............................................................................................2-9
Asynchronous Clear in Clock Modes........................................................................................... 2-9
Output Read Data in Simultaneous Read and Write................................................................2-10
Independent Clock Enables in Clock Modes.............................................................................2-10
MAX 10 Embedded Memory Configurations....................................................................................... 2-10
Port Width Configurations.......................................................................................................... 2-10
Mixed-Width Port Configurations..............................................................................................2-11
Maximum Block Depth Configuration.......................................................................................2-12
MAX 10 Embedded Memory Design Consideration..........................................3-1
Implement External Conflict Resolution..................................................................................................3-1
Customize Read-During-Write Behavior.................................................................................................3-1
Same-Port Read-During-Write Mode.......................................................................................... 3-2
Mixed-Port Read-During-Write Mode.........................................................................................3-3
Consider Power-Up State and Memory Initialization............................................................................3-5
Control Clocking to Reduce Power Consumption................................................................................. 3-5
Selecting Read-During-Write Output Choices........................................................................................3-6
RAM: 1-Port IP Core References........................................................................ 4-1
RAM: 1-Port IP Core Signals For MAX 10 Devices................................................................................4-2
RAM: 1-Port IP Core Parameters For MAX 10 Devices........................................................................ 4-3
RAM: 2-PORT IP Core References..................................................................... 5-1
RAM: 2-Ports IP Core Signals (Simple Dual-Port RAM) For MAX 10 Devices................................ 5-5
RAM: 2-Port IP Core Signals (True Dual-Port RAM) for MAX 10 Devices.......................................5-7
TOC-2
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