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13 revision history, Cs53l30, Contacting cirrus logic support – Cirrus Logic CS53L30 User Manual

Page 67

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DS992F1

67

CS53L30

13 Revision History

13 Revision History

Revision

Change

F1

• Provided specific range of audio sample rates in

System Features

section on

p. 1

.

• Added

Note 6

to

Fig. 2-1

and

Fig. 2-2

.

• Added reference to

Section 5.7

in Note 8 in

Fig. 2-2

.

• Updated mic bias startup delay specification in

Table 3-6

.

• Added power consumption register field settings in

Table 3-9

.

• Updated maximum SCLK duty cycle specification for I

2

S master mode in

Table 3-11

.

• Updated min and max specifications for t

HOLD2

when SHIFT_LEFT = 1 in

Table 3-12

.

• Updated figure in Note 8 in

Table 3-12

.

• Clarified that ADC1x_PDN and ADC2x_PDN bits must be set when input channel type is digital in

Section 7.23

and

Section 7.29

.

• Reformatted presentation of WLCSP package dimensions in

Section 10.1

.

Contacting Cirrus Logic Support

For all product questions and inquiries, contact a Cirrus Logic Sales Representative.
To find one nearest you, go to

www.cirrus.com.

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intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for
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I

2

C is a trademark of Philips Semiconductor.