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Cs53l30 – Cirrus Logic CS53L30 User Manual

Page 13

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DS992F1

13

CS53L30

3 Characteristics and Specifications

Table 3-9. Register Field Settings

Use

Cases

Register Fields and Settings

PDN

_

ULP

PDN

_

LP

MCLK_DIS

MCLK_I

NT_SCALE

MI

C1_BIAS_PDN

MI

C2_BIAS_PDN

MI

C3_BIAS_PDN

MI

C4_BIAS_PDN

MI

C

_

BI

AS

_C

TR

L

AS

P_RA

T

E

[3

:0

]

AS

P_SD

OUT

1

_P

DN

AS

P_SD

OUT

2

_P

DN

AS

P_3ST

ADC

1

A_PD

N

ADC

1

B_PD

N

ADC

2

A_PD

N

ADC

2

B_PD

N

ADC

1

A_PR

EA

MP[1:

0

]

ADC

1

A_PGA

_

VOL[

5:

0]

ADC

1

B_PR

EA

MP[1:

0

]

ADC

1

B_PGA

_

VOL[

5:

0]

ADC

2

A_PR

EA

MP[1:

0

]

ADC

2

A_PGA

_

VOL[

5:

0]

ADC

2

B_PR

EA

MP[1:

0

]

ADC

2

B_PGA

_

VOL[

5:

0]

DMIC

1_P

D

N

DMIC

2_P

D

N

AS

P_M/S

1

— — — — — — — — —

— — — — — — — — —

— — —

2 A

1 — — — — — — — —

— — — — — — — — —

— — —

B

1 — 1 — — — — — —

— — — — — — — — —

— — —

C

0 1 — — — — — — —

— — — — — — — — —

— — —

D

0 1 1 — — — — — —

— — — — — — — — —

— — —

3 A

0 0 0 — 1 1 1 1 — 1100 0 1 0 0 1 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

B

0 0 0 — 0 1 1 1 10 1100 0 1 0 0 1 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

C

0 0 0 1 1 1 1 1 — 0101 0 1 0 0 1 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

D

0 0 0 1 0 1 1 1 10 0101 0 1 0 0 1 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

E

0 0 0 1 1 1 1 1 — 0001 0 1 0 0 1 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

F

0 0 0 1 0 1 1 1 10 0001 0 1 0 0 1 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

G

0 0 0 — 1 1 1 1 — 1100 0 1 0 0 0 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

H

0 0 0 — 0 0 1 1 10 1100 0 1 0 0 0 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

I

0 0 0 1 1 1 1 1 — 0101 0 1 0 0 0 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

J

0 0 0 1 0 0 1 1 10 0101 0 1 0 0 0 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

K

0 0 0 1 1 1 1 1 — 0001 0 1 0 0 0 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

L

0 0 0 1 0 0 1 1 10 0001 0 1 0 0 0 1 1 10 011000 10 011000 10 011000 10 011000 1 1 0

M

0 0 0 — 1 1 1 1 — 1100 0 0 0 0 0 0 0 10 011000 10 011000 10 011000 10 011000 1 1 0

N

0 0 0 — 0 0 0 0 10 1100 0 0 0 0 0 0 0 10 011000 10 011000 10 011000 10 011000 1 1 0

O

0 0 0 1 1 1 1 1 — 0101 0 0 0 0 0 0 0 10 011000 10 011000 10 011000 10 011000 1 1 0

P

0 0 0 1 0 0 0 0 10 0101 0 0 0 0 0 0 0 10 011000 10 011000 10 011000 10 011000 1 1 0

Q

0 0 0 1 1 1 1 1 — 0001 0 0 0 0 0 0 0 10 011000 10 011000 10 011000 10 011000 1 1 0

R

0 0 0 1 0 0 0 0 10 0001 0 0 0 0 0 0 0 10 011000 10 011000 10 011000 10 011000 1 1 0

4 A

0 0 0 — 1 1 1 1 — 1100 0 0 0 0 0 0 0 00 000000 00 000000 00 000000 00 000000 1 1 0

B

0 0 0 1 1 1 1 1 — 0101 0 0 0 0 0 0 0 00 000000 00 000000 00 000000 00 000000 1 1 0

C

0 0 0 1 1 1 1 1 — 0001 0 0 0 0 0 0 0 00 000000 00 000000 00 000000 00 000000 1 1 0

5 A

0 0 0 — 0 0 0 0 10 1100 0 0 0 0 0 0 0 —

0 0 0

B

0 0 0 1 0 0 0 0 10 0101 0 0 0 0 0 0 0 —

0 0 0

C

0 0 0 1 0 0 0 0 10 0001 0 0 0 0 0 0 0 —

0 0 0