Cirrus Logic CS4953xx - Manual (Page 48)

SPI Port
CS4953xx Hardware User’s Manual
DS732UM10 Copyright 2010 Cirrus Logic, Inc 3-16
The data bits of the SCP1_MOSI and SCP1_MISO line are valid on the rising edge of SCP1_CLK. It is the
slave’s responsibility to accept or supply bytes on the bus at the rate at which the master is driving
SCP1_CLK.
All data put on the SCP1_MOSI and SCP1_MISO lines must be in 8-bit bytes. The number of bytes that
can be transmitted per transfer is unrestricted. Data is transferred with the most-significant bit (MSB) first.
For the CS4953xx slave SPI port, the first byte is an address byte that is always sent by the master after a
Start condition. This address byte is an “I
2 C-type” command of a 7-bit address + a R/W bit. The 7-bit SPI
address is 1000000b (0x80).
If the SPI transaction is a write from master to the CS4953xx (R/W = 0, Address = 0x80), then the master
will clock the SCP1_CLK signal and drive the SCP1_MOSI signal with data bytes for the CS4953xx to
read. If the SPI transaction is a read to the master from the CS4953xx (R/W = 1, Address = 0x81), then
the master will drive the SCP1_CLK signal and read the SCP1_MISO signal with the data bytes from the
CS4953xx.
Figure 3-14. Address and Data Bytes
3.4.2.1 SCP1_BSY Behavior
The SCP1_BSY signal is not part of the SPI protocol, but it is provided so that the slave can signal to the
master that it cannot receive any more data. A falling edge of the SCP1_BSY signal indicates the master
must halt transmission. Once the SCP1_BSY signal goes high, the suspended transaction may continue.
The host must obey the SCP1_BSY pin or control data will be lost.
3.4.3 SPI Messaging
Messaging to the CS4953xx using the SPI bus requires usage of all the information provided in the SPI
Bus Description and Bus Dynamics above. For control and application image downloading, SPI
transactions to the CS4953xx will involve 4-byte words. A detailed description of the serial SPI
communication mode is provided in this section. This includes:
• A flow diagram and description for a serial SPI write
• A flow diagram and description for a serial SPI read
SCP1_CLK
SCP1_MOSI 7-bit SPI Address Data Byte
SCP1_CS
R/W
SCP1_CLK
SCP1_MOSI
Data Byte
SCP1_CS
SCP1_MISO
R/W 7-bit SPI Address