Cirrus Logic CS4953xx - Manual (Page 3)

DS732UM10 Copyright 2010 Cirrus Logic, Inc. iii
Contents
CS4953xx Hardware User’s Manual
Contents
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii
Chapter 1. Introduction ......................................................................................... 1-1
1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1
1.1.1 Chip Features .................................................................................................................1-1
1.2 Functional Overview of the CS4953xx Chip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3
1.2.1 DSP Core .......................................................................................................................1-3
1.2.2 Security Extension module .............................................................................................1-3
1.2.3 Debug Controller (DBC) .................................................................................................1-3
1.2.4 Digital Audio Output (DAO1, DAO2) Controller ..............................................................1-3
1.2.5 Digital Audio Input (DAI1) Controller ..............................................................................1-3
1.2.6 Compressed Data Input / Digital Audio Input (DAI2) Controller .....................................1-4
1.2.7 Direct Stream Digital
®
(DSD) Controller .........................................................................1-4
1.2.8 General Purpose I/O.......................................................................................................1-4
1.2.9 Parallel Control Port (Motorola
®
/Intel® Standards) (Optional Feature) .........................1-4
1.2.10 Serial Control Ports (SPI
™
or I
2
C
™
Standards)............................................................1-4
1.2.11 SDRAM Controller ........................................................................................................1-5
1.2.12 Flash Controller ............................................................................................................1-5
1.2.13 DMA Controller .............................................................................................................1-5
1.2.14 Timers...........................................................................................................................1-5
1.2.15 Clock Manager and PLL ...............................................................................................1-6
1.2.16 Programmable Interrupt Controller ...............................................................................1-6
Chapter 2. Operational Modes.............................................................................. 2-1
2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
2.2 Operational Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3
2.3 Slave Boot Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-4
2.3.1 Host Controlled Master Boot ..........................................................................................2-4
2.3.1.1 Performing a Host Controlled Master Boot (HCMB) ......................................2-5
2.3.2 Slave Boot ......................................................................................................................2-7
2.3.2.1 Performing a Slave Boot ................................................................................2-8
2.3.3 Boot Messages.............................................................................................................2-10
2.3.3.1 Slave Boot ..................................................................................................2-10
2.3.3.2 Host-Controlled Master Boot from Parallel ROMthe ....................................2-10
2.3.3.3 Host-Controlled Master Boot from I
2
C ROM................................................2-11
2.3.3.4 Host-Controlled Master Boot from SPI ROM ...............................................2-11
2.3.3.5 Soft Reset ...................................................................................................2-12
2.3.3.6 Messages Read from CS4953xx .................................................................2-12
2.4 Master Boot Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-13
2.5 Softboot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-14
2.5.1 Softboot Messaging......................................................................................................2-14
2.5.2 Softboot Procedure.......................................................................................................2-15
2.5.2.1 Softboot Procedure ......................................................................................2-15
2.5.2.2 Softboot Example ........................................................................................2-16
2.5.2.3 Softboot Example Steps ..............................................................................2-17
Chapter 3. Serial Control Port .............................................................................. 3-1
3.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1