Cirrus Logic CS4953xx - Manual (Page 19)

2-5 Copyright 2010 Cirrus Logic, Inc. DS732UM10
Slave Boot Procedures
CS4953xx Hardware User’s Manual
2.3.1.1 Performing a Host Controlled Master Boot (HCMB)
Figure 2-2 shows the steps taken during a Host Controlled Master Boot (HCMB). The procedure is
discussed in Section 2.3.1.1.1.
Figure 2-2. Host Controlled Master Boot
2.3.1.1.1 Host Controlled Master Boot (HCMB) Procedure
1. Toggle RESET. A download sequence is started when the host holds the RESET pin low for the
required time. The mode pins, HS[4:0] must be in the appropriate state to set the host communication
mode before and immediately after the rising edge of RESET. Pull-up and pull-down resistors are
typically used to set the default state of the HS[4:0] pins.
2. Send the SLAVE_BOOT message. The host sends the appropriate SLAVE_BOOT message to the
CS4953xx using the control port specified (serial port/parallel port) and format specified (I
2
C, SPI,
Intel, etc.) by the HS[4:0] pins at reset.
MSG
==BOOT_START
WRITE_* (HCMB_)
READ_* (MSG) NOTE 2
EXIT(ERROR)
N
Y
MSG==
BOOT_SUCCESS
EXIT (ERROR)
N
Y
READ_* (MSG)
MSG ==APP_START
WRITE_* (SOFT_RESET)
READ_* (MSG)
EXIT (ERROR)
N
Y
MORE .ULD FILES?
Y
N
DONE
SEND HARDWARE
CONFIGURATIONS
SEND FIRMWARE
CONFIGURATIONS
WRITE_* (KICKSTART)
* is replaced with SPI,
I2C, etc. depending on
the communication
protocol used.
RESET (HIGH)
WAIT 50 μ S
START
RESET (LOW)
SET HS[3:0] PINS FOR
OPERATIONAL MODE
WAIT 10 μ S
WRITE_* (SLAVE_BOOT)
MSG
==BOOT_START
EXIT(ERROR)
N
Y
WAIT 10 μ S
READ_* (MSG) NOTE 1
EXIT(ERROR)
N
Y
MSG==
BOOT_SUCCESS
WRITE_*
(SOFT_RESET_DSP_A)
READ_* (MSG) NOTE 1
WRITE_* (BOOT_ ASSIST_A.ULD FILE)
Or (boot_assist_xtal_div2_a*.uld)
NOTE 1. Read four bytes from the DSP.
IRQ will not drop for this read sequence.
NOTE 2. Obey IRQ for all reads from
this point forward.