Cirrus Logic CS4953xx - Manual (Page 111)

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95 123 GPIO33
General Purpose
Input/Output
SCP1_MOSI
SPI Mode Master Data
Output/Slave Data Input 3.3V
(5V tol)
BiDir IN Y
96 - GPIO32
General Purpose
Input/Output
1. SCP1_CS
2. IOWAIT
1. SPI Chip Select
2. SRAM Hold-Off Handshake 3.3V
(5V tol)
BiDir IN Y
97 124 GPIO34
General Purpose
Input/Output 1. SCP1_MISO
2. SCP1_SDA
1. SPI Mode Master Data
Input/Slave Data Output
2. I
2
C Mode Master/Slave
Data IO
3.3V
(5V tol) BiDir/
OD
IN Y
98 125 VDD6
Core power supply
voltage
1.8V PWR
99 126 GPIO35
General Purpose
Input/Output
SCP1_CLK SPI/I
2
C Control Port Clock
3.3V
(5V tol) BiDir/
OD
IN Y
100 - GPIO36
General Purpose
Input/Output
SCP1_IRQ
Serial Control Port Data
Ready Interrupt Request 3.3V
(5V tol) BiDir/
OD
IN Y
101 127 GNDD6 Core ground 0V PWR
102 - GPIO37
General Purpose
Input/Output 1. SCP1_BSY
2. PCP_BSY
1. Serial Control Port 1 Input
Busy
2. Parallel Control Port Input
Busy
3.3V
(5V tol) BiDir/
OD
IN Y
- 128 GPIO37
General Purpose
Input/Output
1. SCP1_BSY
1. Serial Control Port 1 Input
Busy 3.3V
(5V tol) BiDir/
OD
IN Y
103 - GPIO38
General Purpose
Input/Output
1. PCP_WR
2. PCP_DS
3. SCP2_CLK
1. Parallel Port Write Select
(Intel Mode)
2. Parallel Port Data Strobe
(Motorola and Multiplexed
Mode)
3. SPI/I
2
C Control Port Clock
3.3V
(5V tol) BiDir/
OD
IN Y
- 1 GPIO38
General Purpose
Input/Output
1. SCP2_CLK 1. SPI/I
2
C Control Port Clock
3.3V
(5V tol) BiDir/
OD
IN Y
Table 9-10. Pin Assignments (Continued)
LQFP-
144
Pin #
LQFP-
128
Pin #
Function 1
(Default)
Description of Default
Function
Secondary Functions Description of Secondary
Functions
Pwr Type
Reset
State
Pullup
at
Reset