Cirrus Logic CS4953xx - Manual (Page 4)

iv Copyright 2010 Cirrus Logic, Inc. DS732UM10
Contents
CS4953xx Hardware User’s Manual
3.2 Serial Control Port Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
3.3 I
2
C Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2
3.3.1 I
2
C System Bus Description ...........................................................................................3-2
3.3.2 I
2
C Bus Dynamics ..........................................................................................................3-4
3.3.3 I
2
C Messaging ................................................................................................................3-7
3.3.3.1 SCP1_BSY Behavior .....................................................................................3-7
3.3.3.2 Performing a Serial I
2
C Write ........................................................................3-8
3.3.3.3 I
2
C Write Protocol ..........................................................................................3-9
3.3.3.4 Performing a Serial I
2
C Read ........................................................................3-9
3.3.3.5 I
2
C Read Procedure ....................................................................................3-11
3.3.3.6 SCP1_IRQ Behavior ....................................................................................3-13
3.4 SPI Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-13
3.4.1 SPI System Bus Description.........................................................................................3-15
3.4.2 SPI Bus Dynamics........................................................................................................3-15
3.4.2.1 SCP1_BSY Behavior ...................................................................................3-16
3.4.3 SPI Messaging .............................................................................................................3-16
3.4.3.1 Performing a Serial SPI Write ......................................................................3-17
3.4.3.2 SPI Write Protocol .......................................................................................3-17
3.4.3.3 Performing a Serial SPI Read......................................................................3-18
3.4.3.4 SPI Read Protocol .......................................................................................3-19
3.4.3.5 SCP1_IRQ Behavior ....................................................................................3-21
Chapter 4. Parallel Control Port ........................................................................... 4-1
4.1 Parallel Control Availability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1
Chapter 5. Digital Audio Input Interface .............................................................. 5-1
5.1 Digital Audio Input Port Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1
5.1.1 DAI Pin Description ........................................................................................................5-1
5.1.2 Supported DAI Functional Blocks...................................................................................5-2
5.1.3 BDI Port ..........................................................................................................................5-3
5.1.4 Digital Audio Formats .....................................................................................................5-4
5.1.4.1 I
2
S Format .....................................................................................................5-4
5.1.4.2 Left-Justified Format ......................................................................................5-5
5.2 DAI Hardware Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-5
5.2.1 DAI Hardware Naming Convention ................................................................................5-5
Chapter 6. Direct Stream Data (DSD) Input Interface ......................................... 6-1
6.1 Description of Digital Audio Input Port when Configured for DSD Input . . . . . . . . . . . . . . .6-1
6.1.1 DSD Pin Description.......................................................................................................6-1
6.1.2 Supported DSD Functional Blocks .................................................................................6-1
Chapter 7. Digital Audio Output Interface ........................................................... 7-1
7.1 Digital Audio Output Port Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-1
7.1.1 DAO Pin Description.......................................................................................................7-1
7.1.2 Supported DAO Functional Blocks .................................................................................7-3
7.1.3 DAO Interface Formats...................................................................................................7-3
7.1.3.1 I
2
S Format .....................................................................................................7-3
7.1.3.2 Left-Justified Format ......................................................................................7-3
7.1.3.3 One-line Data Mode Format (Multichannel)...................................................7-4
7.1.4 DAO Hardware Configuration.........................................................................................7-4
7.1.5 S/PDIF Transmitter.......................................................................................................7-11