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Rainbow Electronics DS2151Q User Manual

Page 36

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DS2151Q

022697 36/46

TRANSMIT SIDE D4 TIMING Figure 13–6

1

2

3

4

5

6

7

8

9

10

11

12

1

2

3

4

5

FRAME#

TSYNC

1

TSYNC

2

TSYNC

3

TLCLK

TLINK

4

NOTES:

1. TSYNC in the frame mode (TCR2.3=0) and double-wide frame sync is not enabled (TCR2.4=0).

2. TSYNC in the frame mode (TCR2.3=0) and double-wide frame sync is enabled (TCR2.4=1).

3. TSYNC in the multiframe mode (TCR2.3=1).

4. TLINK data (S–bit) is sampled during the F–bit position of even frames for insertion into the outgoing T1

stream when enabled via TCR1.2.

TRANSMIT SIDE ESF TIMING Figure 13–7

FRAME#

TSYNC

1

TSYNC

2

TSYNC

3

TLCLK

4

TLINK

5

TLCLK

6

TLINK

7

1

2

3

4

5

6

7

8

9

10

11

12 13 14

15 16

17 18 19 20 21 22 23 24

NOTES:

1. TSYNC in the frame mode (TCR2.3=0) and double-wide frame sync is not enabled (TCR2.4=0).

2. TSYNC in the frame mode (TCR2.3=0) and double-wide frame sync is enabled (TCR2.4=1).

3. TSYNC in the multiframe mode (TCR2.4=1).

4. ZBTSI mode disabled (TCR2.5=0).