Motorola CPCI-6115 - Manual (Page 89)

Onboard Power Supplies Functional Description
CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D) 87
For software compatibility with the GT-64120/130 devices, the MV64360 maintains
MByteSwap and MWordSwap bits in the PCI Command register. If the PCI Command register’s
MSwapEn bit is set to "1", the MV64360 PCI master performs data swapping according to
PCISwap bits setting. If set to "0" (default), it works according to MByteSwap and MWordSwap
bits setting, as in the GT-64120/130 devices.
Refer to the MV64360 data sheet for additional information and programming details.
4.4.3 Onboard Power Supplies
The CPCI-6115 CPU board requires +5 V and +3.3 V input power. The +/-12 V input voltages
are optional and are routed to the PMC slots. All other required voltages are generated onboard
from the +3.3 V or +5 V power. The processor core voltage regulator has a variable output
which is set using feedback resistors. In addition to the processor core voltage regulator, there
are regulators for +1.8 V, +2.5 V, CPU_VIO, +1.25 V and L3_VIO.
4.4.4 Hot Swap Support
The CPCI-6115 provides hardware to support the physical connection process and the
hardware connection process of the full hot swap system model defined in the CompactPCI
Hot-Swap Specification PICMG 2.1 R2.0. Hot swap support is only applicable when the CPCI-
6115 is installed into a CompactPCI peripheral slot.
4.4.5 Hot Swap Process
The CPCI-6115 may be safely inserted and extracted from a hot-swap system chassis while
power is applied. Hot-swap circuitry protects the board from electrical damage.
The BD_SEL# signal from CPCI bus J1 pin D15 must be driven true (low) for the back end
power supplies to switch on. When BD_SEL# is not asserted only a small portion of the CPCI-
6115 circuitry is powered.
For a system without +/-12 V, the HLTY# signal is driven true (low) to the CPCI bus J1 pin B4
when the +5.0 V and +3.3 V input power supplies are within tolerance. For a system with +/-12
V, these supply voltages can also be monitored and included into the HLTY# signal generation.
A jumper selects whether the +/-12 V should be monitored in this way. The HLTY# signal can
be used as a status indicator.
4.4.6 Intel 21555 Hot Swap Support
The 21555 Bridge contains a CompactPCI Hot Swap Control Register which includes the
following functions:
z The 21555 drives the ENUM# signal during a hot-swap event if the ENUM# Interrupt Mask
(ENUM_MASK) bit in the CompactPCI Hot-Swap Control Register is cleared.
z The 21555 supports the LED On/OFF (LOO) status/control bit in the CompactPCI Hot
Swap Control Register which enables the host to determine the status of the blue Hot Swap
LED and/or force the LED on.