Motorola CPCI-6115 - Manual (Page 80)

CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
Functional Description MV64360 System Controller
78
AD[18] Resistor 1 DRAM Clock
Select
0 DRAM is running at a higher
frequency than the core clock
1 DRAM is running at a same
frequency as the core clock
AD[19] Resistor 0 DRAM
Address/Control
Delay 0 DRAM address and control
signals toggle on falling edge
of DRAM clock
1 DRAM address and control
signals toggle on rising edge
of DRAM clock
AD[21:20] Resistors 11 DRAM control
path pipeline
select
00 Reserved
01 Reserved
10 Two pipe stages
11 Three pipe stages
AD[24:22] Resistors 000 DRAM read path
control 000
100
DRAM running in sync mode
001
111
DRAM running in async mode
AD[25] Fixed 0 Gigabit port2
Enable
0 Disable
1 Enable
AD[28:26] Resistors 000 PCI_1 DLL
control
000 DLL disable
001 Conventional PCI mode at
66MHz
101 PCI-X mode at 133 MHz
110 PCI-X mode at 66 MHz
AD[31:29] PLD 101 PCI_0 DLL
control
000 DLL disable
001 Conventional PCI mode at
66MHz
101 PCI-X mode at 133 MHz
110 PCI-X mode at 66 MHz
TxD0[0] Resistor 0 Gigabit port0
GMII/PCS Select 0 MII/GMII
1 PCS
TxD1[0] Resistor 0 Gigabit port1
GMII/PCS Select 0 MII/GMII
1 PCS
TxD2[0] Resistor 0 Gigabit port2
GMII/PCS Select 0 MII/GMII
1 PCS
Table 4-3 MV64360 Power-Up Configuration Settings (continued)
Device AD
Bus Signal Select
Option
Default
Power-Up
Setting Description State of Bit vs. Function