Motorola CPCI-6115 - Manual (Page 28)

CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
Introduction Standard Compliances
26
1.2 Standard Compliances
The CPCI-6115 is designed to be CE compliant and to meet the following standard
requirements.
Watchdog Timers Four programmable timer/counters in the Marvel MV64360
One watchdog timer in the Marvell MV64360
One watchdog timer in the M48T37V
Peripheral Support Three Gigabit Ethernet interfaces
IDE channel to support CompactFlash on transition module
Two async serial ports (two rear I/O or one front panel, one rear I/O).
PMC Slots PMC 2: 64-bit, 33/66 MHz PCI or 66/133 MHz PCI-X with front-panel I/O plus
rear I/O
PMC 1: 32-bit, 33 MHz PCI
Both slots support non-Monarch Processor PMC modules
Front Panel One asynchronous debug port via RJ-45 connector
Recessed ABORT/RESET switch
CPU Activity and Board Fail LEDs
Switch and blue LED in handle to support hot-swap
Ethernet RJ-45 connector with Status LEDs
Debug Support Serial port with RS-232 interface
Processor JTAG interface
RESET and ABORT signals
Boundary Scan Header
Table 1-1 CPCI-6115 Features (continued)
Feature Description
Table 1-2 Board Standard Compliances
Standard Description
UL 60950-1
EN 60950-1
IEC 60950-1
CAN/CSA C22.2 No 60950-1
Safety Requirements (legal)
CISPR 22
CISPR 24
EN 55022
EN 55024
FCC Part 15
Industry Canada ICES-003
VCCI Japan
AS/NZS CISPR 22
EN 300 386
NEBS Standard GR-1089 CORE
EMC requirements (legal) on system level (predefined Motorola
system)