Motorola CPCI-6115 - Manual (Page 70)

CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
Functional Description Block Diagram
68
4.2 Block Diagram
The block diagram below illustrates the architecture of the CPCI-6115 baseboard.
Figure 4-1 CPCI-6115 Baseboard Block Diagram
Front
Panel
L2 Cache
+
Private Memory
1MB/2MB
Flash A
32MB
Flash B
8MB
NVRAM
RTC
M48T37V
Processor
MPC7457
VPD SPD
DDR SDRAM
(3 bankS)
MV64360
System Controller
PCI646U2
IDE
Controller
Device Bus
60x or MPX Bus 133 MHz
Battery
Single-wide PMC
(PMC1)
21555
Non-Transparent
PCI to PCI
Bridge
cPCI
J5
cPCI
J3
I2C
Init User
cPCI
J1/J2
SROM
PHY PHY
TL16550
UART
PHY
Single-wide PMC
(PMC2)
Hot Swap Power
Compact PCI
Enet Enet IDE
COM2
COM1
PMC1 I/O
PMC2 I/O
33 bit, 33 MHz
PCI
PCI/PCI-X
Bus 0.0, 64 bit
33/66/133 MHz
Enet
COM1
Fail LED
CPU LED
Abt/Rst Switch