Freescale Semiconductor MC68HC08KH12 - Manual (Page 41)

MC68HC(7)08KH12 — Rev. 1.1 Advance Information
Freescale Semiconductor 41
$0050 Unimplemented
R:
W:
$0051
USB HUB Downstream Port 1
Control Register (HDP1CR)
R:
PEN1 LOWSP1 RST1 RESUM1 SUSP1
0 D1+ D1–
W:
$0052
USB HUB Downstream Port 2
Control Register (HDP2CR)
R:
PEN2 LOWSP2 RST2 RESUM2 SUSP2
0 D2+ D2–
W:
$0053
USB HUB Downstream Port 3
Control Register (HDP3CR)
R:
PEN3 LOWSP3 RST3 RESUM3 SUSP3
0 D3+ D3–
W:
$0054
USB HUB Downstream Port 4
Control Register (HDP4CR)
R:
PEN4 LOWSP4 RST4 RESUM4 SUSP4
0 D4+ D4–
W:
$0055 Unimplemented
R:
W:
$0056
USB SIE Timing Interrupt Register
(SIETIR)
R: SOFF EOF2F EOPF TRANF
SOFIE EOF2IE EOPIE TRANIE
W:
$0057
USB SIE Timing Status Register
(SIETSR)
R: RSTF 0 LOCKF 0 0 0 0 0
W: RSTFR LOCKFR SOFFR EOF2FR EOPFR TRANFR
$0058
USB HUB Address Register
(HADDR)
R:
USBEN ADD6 ADD5 ADD4 ADD3 ADD2 ADD1 ADD0
W:
$0059
USB HUB Interrupt Register 0
(HIR0)
R: TXDF RXDF 0 0
TXDIE RXDIE
0 0
W: TXDFR RXDFR
$005A Unimplemented
R:
W:
$005B
USB HUB Control Register 0
(HCR0)
R:
TSEQ STALL0 TXE RXE TPSIZ3 TPSIZ2 TPSIZ1 TPSIZ0
W:
$005C
USB HUB Endpoint1 Control &
Data Register (HCDR)
R:
STALL1 PNEW PCHG5 PCHG4 PCHG3 PCHG2 PCHG1 PCHG0
W:
$005D USB HUB Status Register (HSR)
R: RSEQ SETUP TX1ST 0 RPSIZ3 RPSIZ2 RPSIZ1 RPSIZ0
W: TX1STR
$005E
USB HUB Root Port Control
Register (HRPCR)
R: 0 0 0
RESUM0 SUSPND
0 D0+ D0–
W:
$005F Unimplemented
R:
W:
Addr. Name Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented R = Reserved
Figure 2-2. Control, Status, and Data Registers (Continued)