Freescale Semiconductor MC68HC08KH12 - Manual (Page 191)

MC68HC(7)08KH12 — Rev. 1.1 Advance Information
Freescale Semiconductor 191
PTC[4:0] — Port C Data Bits
These read/write bits are software-programmable. Data direction of
each port C pin is under the control of the corresponding bit in data
direction register C. Reset has no effect on port C data.
The port C pullup enable bit, PCP, in the port option control register
(POC) enables pullups on port C pins if the respective pin is configured
as an input.
(See 12.9 Port Options .)
The LED direct drive bit, LDD, in the port option control register (POC)
controls the drive options for Port C.
12.5.2 Data Direction Register C (DDRC)
Data direction register C determines whether each port C pin is an input
or an output. Writing a logic one to a DDRC bit enables the output buffer
for the corresponding port C pin; a logic zero disables the output buffer.
DDRC[4:0] — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears
DDRC[4:0], configuring all port C pins as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
NOTE: Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Figure 12-9 shows the port C I/O logic.
Address: $0006
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 0 0
DDRC4 DDRC3 DDRC2 DDRC1 DDRC0
Write:
Reset: 0 0 0 0 0 0 0 0
= Unimplemented
Figure 12-8. Data Direction Register C (DDRC)