Freescale Semiconductor MC68HC08KH12 - Manual (Page 146)

Advance Information MC68HC(7)08KH12 — Rev. 1.1
146 Freescale Semiconductor
9.5.7 USB Embedded Device Control Register 2 (DCR2)
ENABLE2 — Embedded Device Endpoint 2 Enable
This read/write bit enables embedded device Endpoint 2 and allows
the USB to respond to IN packets addressed to this endpoint. Reset
clears this bit.
1 = Embedded device Endpoint 2 is enabled and can respond to
an IN token
0 = Embedded device Endpoint 2 is disabled
ENABLE1 — Embedded Device Endpoint 1 Enable
This read/write bit enables embedded device Endpoint 1 and allows
the USB to respond to IN packets addressed to this endpoint. Reset
clears this bit.
1 = Embedded device Endpoint 1 is enabled and can respond to
an IN token
0 = Embedded device Endpoint 1 is disabled
DSTALL2 — Embedded Device Endpoint 2 Force Stall Bit
This read/write bit causes embedded device Endpoint 2 to return a
STALL handshake when polled by either an IN or OUT token by the
USB Host Controller. Reset clears this bit.
1 = Send STALL handshake
0 = Default
Address: $0047
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 0 0 0
ENABLE2 ENABLE1 DSTALL2 DSTALL1
Write:
Reset: 0 0 0 0 0 0 0 0
= Unimplemented
Figure 9-18. USB Embedded Device Control Register 2 (DCR2)