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FUJITSU MB86617A User Manual

Page 131

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LSI S pecification

MB86617A

Rev.1.0

Fujitsu VLSI

126






















































Figure 11.5 Flow example for transmitting Isochronous packet

END

Set value to registers such as Bridge and

TSPIF.

Set necessary data to registers such as

Bridg and TSPIF(Note).

Transmit Late evaluation

Report Transmit late occurred (INT32)

interrupt(assert XINT).

Read Transmit late occurred (INT32)

interrupt.

Discard source packet and transmit

empty packet.

Transmit Late

Yes

No

Isocycle

Yes

Transmit source packet to CP LSI.

START

Store source packet in FIFO at TSPIF.

Input the source packet data and clock

into TSPIF port.

Receive processed source packet from
CP LSI and store it in FIFO at Bridge.

Arbitration result

Arbitration procedure

Lost

Won

Connect source packet according to

register setting and transmit.