Altera Stratix V Avalon-ST - Manual (Page 94)

Signal Directi
on
Description
•
cpl_err[0]
: Completion timeout error with recovery. This signal
should be asserted when a master-like interface has performed a
non-posted request that never receives a corresponding
completion transaction after the 50 ms timeout period when the
error is correctable. The Hard IP automatically generates an
advisory error message that is sent to the Root Complex.
•
cpl_err[1]
: Completion timeout error without recovery. This
signal should be asserted when a master-like interface has
performed a non-posted request that never receives a
corresponding completion transaction after the 50 ms time-out
period when the error is not correctable. The Hard IP automati‐
cally generates a non-advisory error message that is sent to the
Root Complex.
•
cpl_err[2]
: Completer abort error. The Application Layer asserts
this signal to respond to a non-posted request with a Completer
Abort (CA) completion. The Application Layer generates and
sends a completion packet with Completer Abort (CA) status to
the requestor and then asserts this error signal to the Hard IP. The
Hard IP automatically sets the error status bits in the Configura‐
tion Space register and sends error messages in accordance with
the PCI Express Base Specification.
•
cpl_err[3]
: Unexpected completion error. This signal must be
asserted when an Application Layer master block detects an
unexpected completion transaction. Many cases of unexpected
completions are detected and reported internally by the Transac‐
tion Layer. For a list of these cases, refer to Transaction Layer
Errors.
5-42 Completion Side Band Signals
UG-01097_avst
2014.12.15
Altera Corporation Interfaces and Signal Descriptions
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