Altera Stratix V Avalon-ST - Manual (Page 12)

Recommended Speed Grades
Table 1-5: Stratix V Recommended Speed Grades for All Link Widths and Application Layer Clock
Frequencies
Altera recommends setting the Quartus II Analysis & Synthesis Settings Optimization Technique to Speed when
the Application Layer clock frequency is 250 MHz. For information about optimizing synthesis, refer to Setting Up
and Running Analysis and Synthesis in Quartus II Help. For more information about how to effect the
Optimization Technique settings, refer to Area and Timing Optimization in volume 2 of the Quartus II
Handbook.
Link Rate Link Width Interface
Width
Application Clock
Frequency (MHz)
Recommended Speed Grades
Gen1
x1 64 bits 62.5 (2) ,125 –1, –2, –3, –4
x2 64 bits 125 –1, –2, –3, –4
x4 64 bits 125 –1, –2, –3, –4
x8 64 bits 250 –1, –2, –3 (3)
x8 128 Bits 125 –1, –2, –3, –4
Gen2
x1 64 bits
125
–1, –2, –3, –4
x2 64 bits 125 –1, –2, –3, –4
x4 64 bits 250 –1, –2, –3 (3)
x4 128 bits 125 –1, –2, –3, –4
x8 128 bits 250 –1, –2, –3 (3)
x8 256 bits 125 –1, –2, –3, –4
(2) This is a power-saving mode of operation
(3) The -4 speed grade is also possible for this configuration; however, it requires significant effort by the end
user to close timing.
UG-01097_avst
2014.12.15
Recommended Speed Grades 1-11
Datasheet Altera Corporation
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