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Ebfm_cfgwr_imm_wait procedure, Ebfm_cfgwr_imm_nowt procedure – Altera Stratix V Avalon-ST User Manual

Page 246

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ebfm_cfgwr_imm_wait Procedure

The

ebfm_cfgwr_imm_wait

procedure writes up to four bytes of data to the specified configuration

register. This procedure waits until the write completion has been returned.

Location

altpcietb_bfm_driver_rp.v

Syntax

ebfm_cfgwr_imm_wait(bus_num, dev_num, fnc_num, imm_regb_ad, regb_ln, imm_

data, compl_status

Arguments

bus_num

PCI Express bus number of the target device.

dev_num

PCI Express device number of the target device.

fnc_num

Function number in the target device to be accessed.

regb_ad

Byte-specific address of the register to be written.

regb_ln

Length, in bytes, of the data written. Maximum length is four

bytes. The

regb_ln

and the

regb_ad

arguments cannot cross a

DWORD boundary.

imm_data

Data to be written.
This argument is

reg [31:0]

.

The bits written depend on the length:
• 4: 31 downto 0

• 3: 23 downto 0

• 2: 15 downto 0

• 1: 7 downto 0

compl_status

This argument is

reg [2:0]

.

This argument is the completion status as specified in the PCI

Express specification. The following encodings are defined:
• 3’b000: SC— Successful completion

• 3’b001: UR— Unsupported Request

• 3’b010: CRS — Configuration Request Retry Status

• 3’b100: CA — Completer Abort

ebfm_cfgwr_imm_nowt Procedure

The

ebfm_cfgwr_imm_nowt

procedure writes up to four bytes of data to the specified configuration

register. This procedure returns as soon as the VC interface module accepts the transaction, allowing

other writes to be issued in the interim. Use this procedure only when successful completion status is

expected.

UG-01097_avst

2014.12.15

ebfm_cfgwr_imm_wait Procedure

17-35

Testbench and Design Example

Altera Corporation

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