Cirrus Logic CS4970x4 - Manual (Page 4)

iv Copyright 2013 Cirrus Logic, Inc. DS810UM6
CS4953x4/CS4970x4 System Designer’s Guide
Chapter 2. Serial Communication Mode.............................................................. 2-1
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
2.2 Communication Using the Serial Control Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
2.3 Serial Control Port Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
2.4 SPI Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
2.4.1 SPI System Bus Description...........................................................................................2-3
2.4.2 SPI Bus Dynamics..........................................................................................................2-3
2.4.2.1 SCP1_BSY Behavior .....................................................................................2-4
2.4.3 SPI Messaging ...............................................................................................................2-4
2.4.3.1 Performing a Serial SPI Write ........................................................................2-4
2.4.3.2 SPI Write Protocol .........................................................................................2-5
2.4.3.3 Performing a Serial SPI Read........................................................................2-5
2.4.3.4 SPI Read Protocol .........................................................................................2-6
2.4.3.5 SCP1_IRQ Behavior ......................................................................................2-9
2.5 I2C Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9
2.5.1 I
2
C System Bus Description .........................................................................................2-10
2.5.2 I
2
C Bus Dynamics ........................................................................................................2-11
2.5.3 I2C Messaging..............................................................................................................2-14
2.5.3.1 SCP1_BSY Behavior ...................................................................................2-14
2.5.3.2 Performing a Serial I2C Write ......................................................................2-15
2.5.3.3 I2C Write Protocol........................................................................................2-16
2.5.3.4 Performing a Serial I2C Read ......................................................................2-16
2.5.3.5 I2C Read Procedure ....................................................................................2-18
2.5.3.6 SCP1_IRQ Behavior ....................................................................................2-20
Chapter 3. Audio Input Interfaces ........................................................................ 3-1
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
3.2 Digital Audio Input Port Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
3.2.1 DAI Pin Description ........................................................................................................3-1
3.2.2 Supported DAI Functional Blocks...................................................................................3-2
3.2.3 BDI Port ..........................................................................................................................3-3
3.2.4 Digital Audio Formats .....................................................................................................3-3
3.2.4.1 I2S Format .....................................................................................................3-3
3.2.4.2 Left-Justified Format ......................................................................................3-3
3.3 DAI Hardware Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-4
3.3.1 DAI Hardware Naming Convention ................................................................................3-4
3.4 Digital Audio Input Port Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-7
3.4.1 DSD Pin Description.......................................................................................................3-7
3.4.2 Supported DSD Functional Blocks .................................................................................3-7
Chapter 4. Audio Output Interface ....................................................................... 4-1
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1
4.2 Digital Audio Output Port Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1
4.2.1 DAO Pin Description.......................................................................................................4-1
4.2.2 Supported DAO Functional Blocks .................................................................................4-3
4.2.3 DAO Interface Formats...................................................................................................4-3
4.2.3.1 I2S Format .....................................................................................................4-3
4.2.3.2 Left-Justified Format ......................................................................................4-3
4.2.3.3 One-line Data Mode Format (Multichannel)...................................................4-4
4.2.4 DAO Hardware Configuration.........................................................................................4-4
4.2.5 DAO Hardware Naming Convention...............................................................................4-4
4.2.6 S/PDIF Transmitter.........................................................................................................4-9