Cirrus Logic CS4970x4 User Manual
Page 38
DS810
UM6
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Ci
rru
s
Lo
gic
P
-27
CS49
53x4 Pin Assign
me
nts
CS4953
x4/CS497
0x4 System Desig
ner’s Gu
ide
§§
1
138
30
DAI1_LRCLK
PCM Audio Input Sample
Rate (Left/Right) Clock
DSD4
DSD Audio Input Data 4
3.3V (5V
tol)
In
Y
139
31
GNDIO8
I/O ground
0V
PWR
140
-
GPIO42
General Purpose Input/
Output
1. DAI2_LRCLK
2. BDI_REQ
3. PCP_IRQ
4. PCP_BSY
1.PCM Audio Input Sample Rate
Clock
2. Bursty Data Input Request
3. Parallel Control Port Data Ready
Interrupt Request
4. Parallel Control Port Input Busy
3.3V (5V
tol)
BiDir/OD
IN
Y
-
32
GPIO42
General Purpose Input/
Output
1. DAI2_LRCLK
2. BDI_REQ
1.PCM Audio Input Sample Rate
Clock
2. Bursty Data Input Request
3.3V (5V
tol)
BiDir/OD
IN
Y
141
33
GPIO43
General Purpose Input/
Output
1. DAI2_SCLK
2. BDI_CLK
1.PCM Audio Input Bit Clock
2. Bursty Data Input Bit Clock
3.3V (5V
tol)
BiDir
IN
Y
142
34
DAI2_DATA
PCM Audio Input Data
1. DAI1_DATA4
2. DSD5
3. BDI_DATA
1. PCM Audio Input Data 4
2. DSD Audio Input Data 5
3. Bursty Data Input Data
3.3V (5V
tol)
In
Y
143
-
GPIO27
General Purpose Input/
Output
3.3V (5V
tol)
BiDir
IN
Y
144
-
GPIO26
General Purpose Input/
Output
3.3V (5V
tol)
BiDir
IN
Y
-
35
GPIO26
General Purpose Input/
Output
1. DAO2_DATA3
2. XMTB
3. UART_TX_ENABLE
1. Digital Audio Output 3.
2. Outputs IEC60958/61937 format bi-
phase mark encoded S/PDIF data
3. Enable the UART_TX pin
3.3V (5V
tol)
BiDir
IN
Y
1. The
“§§”
symbol is used throughout this manual to indicate the end of the text flow in a chapter.
Table P-11. CS4953x4 Pin Assignments (Continued) for 144-Pin and 128-Pin Packages (Continued)
LQFP-
144
Pin #
LQFP-
128
Pin #
Function 1
(Default)
Description of Default
Function
Secondary Functions
Description of Secondary
Functions
Pwr
Type
Reset
State
Pullup
at
Reset