AMD SB600 - Manual (Page 44)

©2008 Advanced Micro Devices, Inc. OCHI USB 1.1 and EHCI USB 2.0 Controllers
AMD SB600 Register Reference Manual Proprietary Page 44
2.2 OCHI USB 1.1 and EHCI USB 2.0 Controllers
Note: Some USB functions are controlled by, and associated with, certain PCI configuration registers in the
SMBus/ACPI device. For more information refer to
section 2.3: SMBus Module and ACPI Block (Device 20,
Function 0) . The diagram below lists these USB functions and the associated registers.
AD:AC
0Fh
AD:AC
5B/5Ch 78h BEh
USB
OHCI / EHCI Controller Enables
USB Reset / PowerDown
USB Legacy control
USB Smart Power Control
USB PM & SMI Control
61/64/65/68/6Bh ACh 3Ch
PCI_Reg:
2.2.1 OHCI Registers (Device 19, Function 0, 1, 2, 3, 4)
2.2.1.1 PCI Configuration Registers (PCI_Reg)
There are 5 Open-HCI compatible USB host controllers present (functions 0, 1, 2, 3, and 4), and each has
their own set of registers. This section describes the configuration registers necessary for the OpenHCI-
compliant USB Host Controllers to interface with other system components in a PCI-based PC host. These
registers are accessed for set-up during PCI initialization or through special cycles during normal system
runtime. Below is summary of the registers that are necessary for the OpenHCI-compliant USB Host
Controller to be successfully configured in a PCI-based PC host.
OHCI0 – PCI config
Register Name Offset Address
Device / Vendor ID 00h
Command 04h
Status 06h
Revision ID / Class Code 08h
Miscellaneous 0Ch
BAR_OHCI 10h
Subsystem Vendor ID / Subsystem ID 2Ch
Capability Pointer 34h
Interrupt Line 3Ch
Config Timers / MSI Disable 40h – 41h
Port Disable Control 42h – 43h
OHCI Misc Control 50h
Over Current Control 1 58h
Over Current Control 2 5Ch
OHCI OverCurrent Enable 68h – 69h
Target Timeout Control 74h
MSI Control D0h
MSI Address D4h
MSI Data D8h
HT MSI Support E4h
OHCI1/2/3/4 – PCI config