AMD SB600 - Manual (Page 125)

©2008 Advanced Micro Devices, Inc. SMBus Module and ACPI Block (Device 20, Function 0)
AMD SB600 Register Reference Manual Proprietary Page 125
SMBusSlaveControl - RW - 8 bits - [SMBUS:08h]
Field Name Bits Default Description
SlaveEnable 0 0b Enable the generation of an interrupt or resume event upon an
external SMBus master generating a transaction with an
address that matches the host controller slave port of 10h and
a command field which matches the SMBus slave control
register and a match of corresponding enabled events.
SMBusShadow1En 1 0b Enable the generation of an interrupt or resume event upon an
external SMBus master generating a transaction with an
address that matches the SMBus Shadow 1 register.
SMBusShadow2En 2 0b Enable the generation of an interrupt or resume event upon an
external SMBus master generating a transaction with an
address that matches the SMBus Shadow 2 register.
SMBusAlertEnable 3 0b Enable the generation of an interrupt or resume event on the
assertion of AMBALERT_ signal. (This function is not
supported). [Read-only]
Reserved 7:4 0h
SMBusShadowCmd - RW - 8 bits - [SMBUS:09h]
Field Name Bits Default Description
SMBusShadowCmd 7:0 00h This field contains the command value which was received
during an external SMBus master access whose address field
matched the host slave address (10h) or one of the slave
shadow ports.
SMBusSlaveEvent - RW - 16 bits - [SMBUS:0A-0Bh]
Field Name Bits Default Description
SMBusSlaveEvent 15:0 0000h This field contains data bits used to compare against incoming
data to the SMBus Slave Data register. When a bit in this
register is 1 and a corresponding bit in SMBus Slave register
is set, then an interrupt or resume event is generated if the
command value matches the value in the SMBus slave control
register and the access was to SMBus host address 10h.
SlaveData - RW - 16 bits - [SMBUS:0C-0Dh]
Field Name Bits Default Description
SlaveData 15:0 0000h This field contains the data value which was transmitted during
an external SMBus master access whose address field
matched one of the slave shadow port addresses or the
SMBus host controller slave port address of 10h.
SMBusTiming - RW - 8 bits - [SMBUS:0Eh]
Field Name Bits Default Description
SMBusTiming 7:0 A0h This register controls the frequency on the SMBUS. The
formula to calculate the frequency is:
Frequency = 66Mhz/(SmBusTiming * 4)