AMD SB600 - Manual (Page 227)

©2008 Advanced Micro Devices, Inc. HD Audio Controllers Registers
AMD SB600 Register Reference Manual Proprietary Page 227
2.6 HD Audio Controllers Registers
Note: Some HD Audio functions are controlled by, and associated with, certain PCI configuration registers in
the SMBus/ACPI device. For more information refer to
section 2.3: SMBus Module and ACPI Block (Device
20, Function 0) . The diagram below lists these HD Audio functions and the associated registers.
2.6.1 HD Audio Controller PCI Configuration Space Registers (Device 20 Function 2)
The PCI Configuration Space Registers define the operation of the SB600’s HD Audio Controller. These
registers are accessible only when the HD Audio Controller detects a Configuration Read or Write operation,
with its IDSEL asserted.
Register Name Offset Address
Device ID 00h
Vendor ID 02h
PCI Command 04h
PCI Status 06h
Revision ID 08h
Programming Interface 09h
Sub Class Code 0Ah
Base Class Code 0Bh
Cache Line Size 0Ch
Latency Timer 0Dh
Header Type 0Eh
BIST 0Fh
Lower Base Address Register 10h
Upper Base Address Register 14h
Subsystem Vendor ID 2Ch
Subsystem ID 2Eh
Capabilities Pointer 34h
Interrupt Line 3Ch
Interrupt Pin 3Dh
Minimum Grant 3Eh
Maximum Latency 3Fh
Misc Control Register 42h
Interrupt Pin Control Register 44h
Power Management Capability ID 50h
Power Management Capabilities 52h
Power Management Control/Status 54h
MSI Capability ID 60h
MSI Message Control 62h
MSI Message Lower Address 64h
MSI Message Upper Address 68h
MSI Message Data 6Ch
Vendor ID – R – 16 bits – [PCI_Reg: 00h]
Field Name Bits Default Description
Vendor ID 15:0 1002h Identifies the vendor as AMD.
Device ID – RW – 16 bits – [PCI_Reg: 02h]
Field Name Bits Default Description
Device ID 15:0 4383h Identifies this device as the HD Audio Controller.