Texas Instruments MSP430x4xx User Manual

Page 60

Instruction Set

3-26

RISC 16−Bit CPU

BIS[.W]

Set bits in destination

BIS.B

Set bits in destination

Syntax

BIS

src,dst or BIS.W

src,dst

BIS.B

src,dst

Operation

src .OR. dst −> dst

Description

The source operand and the destination operand are logically ORed. The
result is placed into the destination. The source operand is not affected.

Status Bits

Status bits are not affected.

Mode Bits

OSCOFF, CPUOFF, and GIE are not affected.

Example

The six LSBs of the RAM word TOM are set.

BIS

#003Fh,TOM; set the six LSBs in RAM location TOM

Example

The three MSBs of RAM byte TOM are set.

BIS.B

#0E0h,TOM

; set the 3 MSBs in RAM location TOM