Texas Instruments MSP430x4xx - Manual (Page 4)

Glossary
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Glossary
ACLK Auxiliary Clock See Basic Clock Module
ADC Analog-to-Digital Converter
BOR Brown-Out Reset See System Resets, Interrupts, and Operating Modes
BSL Bootstrap Loader See www.ti.com/msp430 for application reports
CPU Central Processing Unit See RISC 16-Bit CPU
DAC Digital-to-Analog Converter
DCO Digitally Controlled Oscillator See FLL+ Module
dst Destination See RISC 16-Bit CPU
FLL Frequency Locked Loop See FLL+ Module
GIE General Interrupt Enable See System Resets Interrupts and Operating Modes
INT(N/2) Integer portion of N/2
I/O Input/Output See Digital I/O
ISR Interrupt Service Routine
LSB Least-Significant Bit
LSD Least-Significant Digit
LPM Low-Power Mode See System Resets Interrupts and Operating Modes
MAB Memory Address Bus
MCLK Master Clock See FLL+ Module
MDB Memory Data Bus
MSB Most-Significant Bit
MSD Most-Significant Digit
NMI (Non)-Maskable Interrupt See System Resets Interrupts and Operating Modes
PC Program Counter See RISC 16-Bit CPU
POR Power-On Reset See System Resets Interrupts and Operating Modes
PUC Power-Up Clear See System Resets Interrupts and Operating Modes
RAM Random Access Memory
SCG System Clock Generator See System Resets Interrupts and Operating Modes
SFR Special Function Register
SMCLK Sub-System Master Clock See FLL+ Module
SP Stack Pointer See RISC 16-Bit CPU
SR Status Register See RISC 16-Bit CPU
src Source See RISC 16-Bit CPU
TOS Top-of-Stack See RISC 16-Bit CPU
WDT Watchdog Timer See Watchdog Timer