Ie1, interrupt enable register 1, Ie2, interrupt enable register 2 – Texas Instruments MSP430x4xx User Manual
Page 306
USART Registers: SPI Mode
15-20
USART Peripheral Interface, SPI Mode
IE1, Interrupt Enable Register 1
7
6
5
4
3
2
1
0
UTXIE0
URXIE0
rw−0
rw−0
UTXIE0
Bit 7
USART0 transmit interrupt enable. This bit enables the UTXIFG0 interrupt.
0
Interrupt not enabled
1
Interrupt enabled
URXIE0
Bit 6
USART0 receive interrupt enable. This bit enables the URXIFG0 interrupt.
0
Interrupt not enabled
1
Interrupt enabled
Bits
5-0
These bits may be used by other modules. See device-specific datasheet.
IE2, Interrupt Enable Register 2
7
6
5
4
3
2
1
0
UTXIE1
URXIE1
rw−0
rw−0
Bits
7-6
These bits may be used by other modules. See device-specific datasheet.
UTXIE1
Bit 5
USART1 transmit interrupt enable. This bit enables the UTXIFG1 interrupt.
0
Interrupt not enabled
1
Interrupt enabled
URXIE1
Bit 4
USART1 receive interrupt enable. This bit enables the URXIFG1 interrupt.
0
Interrupt not enabled
1
Interrupt enabled
Bits
3-0
These bits may be used by other modules. See device-specific datasheet.