Texas Instruments MSP430x4xx - Manual (Page 300)

USART Registers: SPI Mode
15-14 USART Peripheral Interface, SPI Mode
UxCTL, USART Control Register
7 6 5 4 3 2 1 0
Unused Unused I2C † CHAR LISTEN SYNC MM SWRST
rw−0 rw−0 rw−0 rw−0 rw−0 rw−0 rw−0 rw−1
Unused Bits
7−6 Unused
I2C † Bit 5 I2C mode enable. This bit selects I2C or SPI operation when SYNC = 1.
0
SPI mode
1 I 2 C mode
CHAR Bit 4 Character length
0
7-bit data
1 8-bit data
LISTEN Bit 3 Listen enable. The LISTEN bit selects the loopback mode
0
Disabled
1 Enabled. The transmit signal is internally fed back to the receiver
SYNC Bit 2 Synchronous mode enable
0
UART mode
1 SPI mode
MM Bit 1 Master mode
0
USART is slave
1 USART is master
SWRST Bit 0 Software reset enable
0
Disabled. USART reset released for operation
1 Enabled. USART logic held in reset state
† Applies to USART0 on MSP430x15x and MSP430x16x devices only.