Texas Instruments MSP430x4xx - Manual (Page 36)

CPU Introduction
3-2 RISC 16-Bit CPU
3.1 CPU Introduction
The CPU incorporates features specifically designed for modern
programming techniques such as calculated branching, table processing and
the use of high-level languages such as C. The CPU can address the complete
address range without paging.
The CPU features include:
- RISC architecture with 27 instructions and 7 addressing modes.
- Orthogonal architecture with every instruction usable with every
addressing mode.
- Full register access including program counter, status registers, and stack
pointer.
- Single-cycle register operations.
- Large 16-bit register file reduces fetches to memory.
- 16-bit address bus allows direct access and branching throughout entire
memory range.
- 16-bit data bus allows direct manipulation of word-wide arguments.
- Constant generator provides six most used immediate values and
reduces code size.
- Direct memory-to-memory transfers without intermediate register holding.
- Word and byte addressing and instruction formats.
The block diagram of the CPU is shown in Figure 3−1.