Texas Instruments MSP430x4xx - Manual (Page 124)

FLL+ Clock Module Registers
4-15 FLL+ Clock Module
FLL_CTL1, FLL+ Control Register 1
7 6 5 4 3 2 1 0
Unused
SMCLK
OFF † XT2OFF † SELMx † SELS † FLL_DIVx
r0 r0 rw−(1) rw−(0) rw−(0) rw−(0) rw−(0) rw−(0)
† Not present in MSP430x41x, MSP430x42x devices.
Unused Bit 7
SMCLKOFF Bit 6 SMCLK off. This bit turns off SMCLK. Not present in MSP430x41x,
MSPx42x devices.
0
SMCLK is on
1 SMCLK is off
XT2OFF Bit 5 XT2 off. This bit turns off the XT2 oscillator. Not present in MSP430x41x,
MSPx42x devices.
0
XT2 is on
1 XT2 is off if it is not used for MCLK or SMCLK.
SELMx Bits
4−3 Select MCLK. These bits select the MCLK source. Not present in
MSP430x41x, MSP430x42x devices.
00
DCOCLK
01 DCOCLK
10 XT2CLK
11 LFXT1CLK
SELS Bit 2 Select SMCLK. This bit selects the SMCLK source. Not present in
MSP430x41x, MSP430x42x devices.
0
DCOCLK
1 XT2CLK
FLL_DIVx Bits
1−0 ACLK divider
00
/1
01 /2
10 /4
11 /8