Texas Instruments MSP430x4xx - Manual (Page 100)

Instruction Set
3-66 RISC 16−Bit CPU
SUB[.W] Subtract source from destination
SUB.B Subtract source from destination
Syntax SUB src,dst or SUB.W src,dst
SUB.B src,dst
Operation dst + .NOT.src + 1 −> dst
or
[(dst − src −> dst)]
Description The source operand is subtracted from the destination operand by adding the
source operand’s 1s complement and the constant 1. The source operand is
not affected. The previous contents of the destination are lost.
Status Bits N: Set if result is negative, reset if positive
Z: Set if result is zero, reset otherwise
C: Set if there is a carry from the MSB of the result, reset otherwise.
Set to 1 if no borrow, reset if borrow.
V: Set if an arithmetic overflow occurs, otherwise reset
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
Example See example at the SBC instruction.
Example See example at the SBC.B instruction.
Note: Borrow Is Treated as a .NOT.
The borrow is treated as a .NOT. carry : Borrow Carry bit
Yes 0
No 1