Texas Instruments MSP430x4xx - Manual (Page 183)

8-23
DMAxDA, DMA Destination Address Register
15 14 13 12 11 10 9 8
DMAxDAx
rw rw rw rw rw rw rw rw
7 6 5 4 3 2 1 0
DMAxDAx
rw rw rw rw rw rw rw rw
DMAxDAx Bits
15−0 DMA destination address. The destination address register points to the
destination address for single transfers or the first address for block transfers.
The DMAxDA register remains unchanged during block and burst-block
transfers.
DMAxSZ, DMA Size Address Register
15 14 13 12 11 10 9 8
DMAxSZx
rw rw rw rw rw rw rw rw
7 6 5 4 3 2 1 0
DMAxSZx
rw rw rw rw rw rw rw rw
DMAxSZx Bits
15−0 DMA size. The DMA size register defines the number of byte/word data per
block transfer. DMAxSZ register decrements with each word or byte transfer.
When DMAxSZ decrements to 0, it is immediately and automatically reloaded
with its previously initialized value.
00000h
Transfer is disabled
00001h One byte or word is transferred
00002h Two bytes or words are transferred
:
0FFFFh 65535 bytes or words are transferred