Figure 24−5. analog front-end output timing – Texas Instruments MSP430x4xx User Manual

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Scan IF Operation

24-10

Scan IF

When SIFCAX = 1, the SIFCSEL and SIFCI3 bits select between the SIFCIx
channels and the SIFCI input allowing storage of the comparator output for
one input signal into the four output bits SIF0OUT - SIF3OUT. This can be used
to observe the envelope function of sensors.

The output logic is enabled by the SIFRSON(tsm) signal. When the
comparator output is high while SIFRSON = 1, an internal latch is set.
Otherwise the latch is reset. The latch output is written into the selected output
bit with the rising edge of the SIFSTOP(tsm) signal as shown in Figure 24−5.

Figure 24−5. Analog Front-End Output Timing

SIFRSON(tsm)

Comparator Output

Internal Latch

SIFSTOP(tsm)

SIFxOUT/

SIFTCHxOUT

Time