Texas Instruments MSP430x4xx - Manual (Page 113)

4-4 FLL+ Clock Module
Figure 4−2. MSP430x42x and MSP430x41x Frequency-Locked Loop
10−bit
Frequency
Integrator
DCO
+
Modulator
DC
Generator
OSCOFF
FNx SCG1
off
SCG0
Enable
PUC
Reset
ACLK
XTS_FLL
DCOPLUS
FLL_DIVx
FLLDx
ACLK/n
CPUOFF
10
M
fCrystal
SMCLK
XIN
XOUT
fDCO
+
−
fDCO/D
/(N+1)
0
1
1
0
Divider
/1/2/4/8
Divider
/1/2/4/8
4
LFXT1 Oscillator
LF XT
0 V
LFOff
XT1Off
0 V
f
DCOCLK
XCAPxPF
MCLK to CPU
MCLK to Peripherals